PDF (4.1 MB),
(c) Copyright, 2018
Peiyao Shi
Masters Thesis
VLSI Computation Laboratory
Department of Electrical and Computer Engineering
University of California, Davis
Technical Report ECE-VCL-2018-1,
VLSI Computation Laboratory,
University of California, Davis, 2018.
Sparse matrix-vector multiplication (SpMV) is a critical operation in scientific computing and engineering applications. This thesis explores implementing SpMV kernels on a many-core array. Eight functionally equivalent SpMV implementations are created for a fine-grained many-core platform with independent shared memory modules and FP capabilities. These implementations are considered against one general-purpose processor chip (Intel Core-i7 3720QM) and one graphics processing unit (GPU) chip (NVIDIA Quadro 620). The designs for the many-core array, general-purpose processor, and GPU are evaluated using the metrics of throughput per area and throughput per watt when operating on a set of twenty-seven unstructured sparse matrices of varying dimensions sourced from a wide range of domains including directed graph, circuit simulation problem, computational fluid dynamics problem, structural problem, and theoretical/quantum chemistry problem.
Since different scale methodologies and data types are used, throughput, power and area results are scaled to 32 nm and single-precision FP values for the general-purpose processor, GPU and fine-grained many-core implementations. The improvement in throughput per watt achieved from experiments is 69× on average among all simulated matrices versus the general-purpose processor implementations, and 94× on average versus the GPU implementations. The improvement in throughput per area achieved from experiments is 54× on average versus the general-purpose processor implementations, and 40× on average versus the GPU implementations.
PDF (4.1 MB),
(c) Copyright, 2018Peiyao Shi, "Sparse Matrix Multiplication on a Many-Core Platform," Masters Thesis, Technical Report ECE-VCL-2018-1, VLSI Computation Laboratory, ECE Department, University of California, Davis, 2018.
@mastersthesis{peiyao:vcl:mastersthesis,
author = {Peiyao Shi},
title = {Sparse Matrix Multiplication on a Many-Core Platform},
school = {University of California, Davis},
year = 2018,
address = {Davis, CA, USA},
month = dec,
note = {\url{http://vcl.ece.ucdavis.edu/pubs/theses/2018-1.pshi/}}
}