DeepScaleTool: A Tool for the Accurate Estimation of Technology Scaling in the Deep-Submicron Era

Satyabrata Sarangi
Bevan M. Baas

Abstract:

The estimation of classical CMOS "constant-field" or "Dennard" scaling methods that define scaling factors for various dimensional and electrical parameters have become less accurate in the deep-submicron regime, which drives the need for better estimation approaches especially in the educational and research domains. We present DeepScaleTool, a tool for the accurate estimation of deep-submicron technology scaling by modeling and curve fitting published data by a leading com- mercial fabrication company for silicon fabrication technology generations from 130 nm to 7 nm for the key parameters of area, delay, and energy. Compared to 10 nm–7 nm scaling data published by a leading foundry, the DeepScaleTool achieves an error of 1.7% in area, 2.5% in delay, and 5% in power. This compares favorably with another leading academic estimation method that achieves an error of 24% in area, 9.1% in delay, and 24.9% in power.

Paper

  PDF (387 KB)   [IEEE link],   (c) Copyright 2021

Tool source code

https://sourceforge.net/projects/deepscaletool/

Reference

Satyabrata Sarangi and Bevan M. Baas, "DeepScaleTool: A Tool for the Accurate Estimation of Technology Scaling in the Deep-Submicron Era," IEEE International Symposium on Circuits & Systems, Daegu, Korea, May 2021.

BibTeX Entry

@inproceedings{sarangi:iscas2021,
   author    = {Satyabrata Sarangi and Bevan M. Baas},
   booktitle = {{IEEE} International Symposium on Circuits & Systems},
   title     = {{DeepScaleTool}: A Tool for the Accurate Estimation of Technology Scaling in the Deep-Submicron Era},
   year      = 2021,
   month     = may
   }