Scalable Hardware-Based Power Management for Many-Core Systems

Bin Liu
Brent Bohnenstiehl
Bevan M. Baas

VLSI Computation Laboratory
Department of Electrical and Computer Engineering
University of California, Davis

Abstract:

Due to high levels integration, the design of many-core systems becomes increasingly challenging. Runtime 
dynamic voltage and frequency scaling (DVFS) is an effective method in managing the power based on performance
requirements in the presence of workload variations. This paper presents an on-line scalable hardware-based 
dynamic voltage frequency selection algorithm,by using both FIFO occupancy and stall information between processors.
To demonstrate the proposed solution, two real application benchmarks are tested on a many-core globally asynchronous 
locally synchronous (GALS) platform. The experimental results show that the proposed approach can achieve near-optimal 
power saving under performance constraints.

Paper

Poster

Reference

Bin Liu, B. Bohnenstiehl, and B. M. Baas, "Scalable Hardware-Based Power Management for Many-Core Systems," IEEE Asilomar Conference on Signals, Systems and Computers (ACSSC) Nov. 2014.

BibTeX Entry

@INPROCEEDINGS{Liu:ACSSC2014,
   author={Bin Liu, B. Bohnenstiehl and Bevan M. Baas},
   booktitle={IEEE Asilomar Conference on Signals, Systems and Computers ({ACSSC})}, 
   title={Scalable Hardware-Based Power Management for Many-Core Systems},
   year={2014},
   month={Nov.}
}

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Last update: December 8, 2014