This paper presents a high-performance parallel context-based adaptive length coding (CAVLC) encoder implemented on a fine-grained many-core system. The software encoder is designed for a H.264/AVC baseline profile encoder. By utilizing arithmetic table elimination and compression techniques, the data-flow of the CAVLC encoder has been partitioned and mapped to an array of 15 small processors. The parallel workload of each processor is characterized and balanced for further throughput optimization. The proposed parallel CAVLC encoder achieves the real-time processing requirement of 30 frames per second for 720p HDTV. Our experiments show that the presented CAVLC encoder has 4.86 to 6.83 times higher throughput and requires far smaller chip area than the identical encoder implemented on state-of-art general-purpose processors. In comparison to published implementations on common DSP processors, the design has approximately 1.0 to 6.15 times higher throughput while requiring less than 6 times smaller area.
Zhibin Xiao, Bevan M. Baas. "A High-Performance Parallel CAVLC Encoder on a Fine-Grained Many-core System." International Conference on Computer Design, (ICCD '08), October 2008, C3.1.
@inproceedings{UCDVCL:2008:SYSTEM,
author = {Zhibin Xiao and
Bevan M. Baas},
title = {A High-Performance Parallel CAVLC Encoder on a Fine-Grained Many-core System},
booktitle = {International Conference on Computer Design, (ICCD '08)},
month = October,
year = 2008,
pages = {248--254}
}
Last update: October 15, 2008