Dynamic Voltage and Frequency Scaling Circuits with Two Supply Voltages

Wayne H. Cheng
Bevan M. Baas
VLSI Computation Laboratory
Department of Electrical and Computer Engineering
University of California, Davis

Abstract:

This paper presents circuits that enable dynamic voltage and frequency scaling (DVFS) for finegrained chip multi-processors to reduce both dynamic and leakage power dissipation. Each processor can run on either a high voltage or low voltage power supply, or disconnect from both. Switching between power supplies is performed dynamically, where scaling decisions are based on each processor's workload, allowing for reduced power consumption without a significant impact on performance. Tradeoffs in performance versus circuit area and supply noise are examined. The DVFS circuits are designed in a wrapper around each individual processor, resulting in a 12% area overhead. DVFS operation utilizing supply voltages of 1.3 V and 0.8 V on a nine-processor JPEG application reduces average energy consumption by 48% while reducing performance by only 8%.

Paper

Presentation Slides

Reference

Wayne H. Cheng and Bevan M. Baas. "Dynamic Voltage and Frequency Scaling Circuits with Two Supply Voltages" In Proceedings of The IEEE International Symposium on Circuits and Systems (ISCAS), May 2008, pp. 1236-1239.

BibTeX entry

@inproceedings{UCDVCL:2008:ISCAS_DVFS,
   author    = {Wayne H. Cheng and Bevan M. Baas},
   title     = {Dynamic Voltage and Frequency Scaling Circuits with Two Supply Voltages}, 
   booktitle = {IEEE International Symposium on Circuits and Systems (ISCAS)},
   month     = may,
   year      = 2008,
   pages     = {1236-1239}
   }
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Last update: May 24, 2008