A Full-Rate Software Implementation of an IEEE 802.11a Compliant Digital Baseband Transmitter

Michael J. Meeuwsen
Omar Sattari
Bevan M. Baas
VLSI Computation Laboratory
Department of Electrical and Computer Engineering
University of California, Davis

Abstract:

A software based IEEE 802.11a digital baseband transmitter has been implemented on a highly parallel single-chip DSP processor. The processing platform is a programmable and reconfigurable Asynchronous Array of simple Processors (AsAP) that is well matched to complex system workloads such as 802.11a. The transmitter is the first fully-compliant 802.11a software implementation, and is the first full-rate software implementation. The transmitter also complies with the high-rate portions of the 802.11g standard. It operates over all 8 data rates, includes additional upsampling and filtering functions, and sustains transmissions at 54 Mb/s on a 22-processor array—which is expected to occupy less than 20 mm2 in 0.18 µm CMOS.

Paper

Reference

Michael J. Meeuwsen, Omar Sattari, Bevan M. Baas. "A Full-Rate Software Implementation of an IEEE 802.11a Compliant Digital Baseband Transmitter." In Proc. Signal Processing Systems, 2004. SIPS 2004. IEEE Workshop on., October 2004.

BibTeX entry

@inproceedings{Meeuwsen:2004:FR11a,
   author =        {M. J. Meeuwsen and O. Sattari and B. M. Baas},
   title =         {A Full-Rate Software Implementation of an {IEEE}
                   {802.11a} Compliant Digital Baseband Transmitter},
   booktitle =     {IEEE Workshop on Signal Processing Systems
                   ({SiPS} '04)},
   month =         oct,
   year =          2004
   }

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Last update: October 29, 2004